Flat Panel Displays (FPDs) have infiltrated consumer electronics that are integrated with display functions. Among existing FPDs, Thin film transistor (TFT)-liquid crystal displays (LCDs) dominate the current display marketplace with a 97.5% market share in 2013 even though there are certain limitations on color, contrast, and response time. More recently, display capital expenditures have rapidly shifted from TFT-LCDs to AMOLEDs, not only because of the superior display qualities of color, contrast and response time, but also large AMOLEDs in Gen 8 or larger fabrications have a cost edge over TFT-LCDs. To be able to fabricate greater than Gen 8 size AMOLEDs, there are several technology challenges, including limitations in conventional active matrix thin-film transistor (TFT) backplanes. (See, e.g., G. Gu and S. R. Forrest, IEEE Journal of Selected Topics in Quantum Electronics, vol. 4, pp. 83-99, 1998, the disclosure of which is incorporated herein by reference.)
The current active matrix TFT backplanes used to drive AM-LCD pixels are typically made of amorphous silicon (a-Si), which has a low mobility (−1 cm2V−1s−1) and poor stability, and is therefore unsuitable for AMOLED pixels. (See, M. J. Powell, IEEE Transactions on Electron Devices, vol. 36, pp. 2753-2763, 1989, the disclosure of which is incorporated herein by reference.) As a result of these deficiencies, currently AMOELD displays are driven by low temperature polycrystalline silicon (poly-Si) TFTs that suffer from high fabrication cost and time, and device size, orientation, and inhomogeneity limitations, all of which present a severe challenge to increasing display size and production yield. (See, e.g., C.-P. Chang and Y.-C. S. Wu, IEEE electron device letters, vol. 30, pp. 130-132, 2009; Y.-J. Park, M.-H. Jung, S.-H. Park and O. Kim, Japanese Journal of Applied Physics, vol. 49, pp. 03CD01, 2010; and P.-S. Lin, and T.-S. Li, IEEE electron device letters, vol. 15, pp. 138-139, 1994, each of the disclosures of which are incorporated herein by reference.)
Although low temperature polycrystalline silicon (LTPS) backplanes have been under mass production up to Gen 5.5, LTPS fabrication techniques including excimer laser annealing (ELA) and advanced solid phase crystallization (ASPC) creates substantial hurdles for >Gen 8 scale-up. For example, both ELA and ASPC fabs have a very slow total average cycle time, more than twice of the typical 60 sec for a-Si. This doubles the capital cost for the array process of a-Si. Additionally, scale-up of ELA could cause non-uniformity and array failure. The high temperature of the ASPC process (˜600° C.) requires expensive glass to avoid glass warping and shrinkage. (B. Young, Information Display, vol. 10, pp. 24, 2010, the disclosure of which is incorporated herein by reference.) The higher processing temperatures and more complicated photomask required to manufacture LTPS increases capex and the difficulty of achieving high yield rates. This makes a 5″ LTPS TFT-LCD (1920×1080 pixels) 14% more expensive than a same size a-Si TFT-LCD.
Accordingly, a need exists for manufacturing techniques to allow for the production of less expensive TFT backplanes.